A CDR circuit is a key building block in many high speed wireline data communication applications, such as optical networks, backplane interconnects and chip-to-chip interconnection. Its function is to extract a transmitted data sequence and clocking/timing information from a received signal, which has typically been subjected to noise and signal distortion. The CDR circuit detects signal transitions in the received data and produces a stable clock signal (namely, a recovered clock signal). The recovered clock signal drives a decision circuit that samples the received signal and produces a retimed data stream. A deserializer circuit follows the CDR circuit to convert the recovered bit stream into word-aligned data.
The CDR circuit, together with the deserializer circuit, plays an important role in the overall performance of a high speed transmission system. Not only does it determine bit error rate (BER) and the stability of the transmission link, but also consumes a substantial portion of overall receiver power.